Publications

2026

1. arXiv

   RaZeR: Pushing the Limits of NVFP4 Quantization with Redundant Zero Remapping

   Yuzong Chen^*, Xilai Dai^*, Jake Hyun^*, Chi-Chih Chang, Wonsuk Jang, Yuheng Wu, Thierry Tambe, Jae-sun Seo, and Mohamed S. Abdelfattah

   arXiv preprint

   arXiv Bib Code

   @article{razer,
     title = {RaZeR: Pushing the Limits of NVFP4 Quantization with Redundant Zero Remapping},
     author = {Chen, Yuzong and Dai, Xilai and Hyun, Jake and Chang, Chi-Chih and Jang, Wonsuk and Wu, Yuheng and Tambe, Thierry and Seo, Jae-sun and Abdelfattah, Mohamed S.},
     journal = {arXiv preprint},
     year = {2026},
   }

2. TC

   Bit-Serial Acceleration of LLM Inference With Mixture-of-Datatype Quantization

   Yuzong Chen, Chi-Chih Chang, Xilai Dai, Ahmed F. AbouElhamayed, Marta Andronic, George A. Constantinides, and Mohamed S. Abdelfattah

   IEEE Transactions on Computers

   Bib HTML

   @article{bitmod-tc,
     title = {Bit-Serial Acceleration of LLM Inference With Mixture-of-Datatype Quantization},
     author = {Chen, Yuzong and Chang, Chi-Chih and Dai, Xilai and AbouElhamayed, Ahmed F. and Andronic, Marta and Constantinides, George A. and Abdelfattah, Mohamed S.},
     journal = {IEEE Transactions on Computers},
     year = {2026},
   }

2025

1. arXiv

   P3-LLM: An Integrated NPU-PIM Accelerator for LLM Inference Using Hybrid Numerical Formats

   Yuzong Chen, Chao Fang, Xilai Dai, Yuheng Wu, Thierry Tambe, Marian Verhelst, and Mohamed S. Abdelfattah

   arXiv preprint

   arXiv Bib Code

   @article{p3llm,
     title = {P3-LLM: An Integrated NPU-PIM Accelerator for LLM Inference Using Hybrid Numerical Formats},
     author = {Chen, Yuzong and Fang, Chao and Dai, Xilai and Wu, Yuheng and Tambe, Thierry and Verhelst, Marian and Abdelfattah, Mohamed S.},
     journal = {arXiv preprint},
     year = {2025},
   }

2. HPCA

   BitMoD: Bit-serial Mixture-of-Datatype LLM Acceleration

   Yuzong Chen, Ahmed F. AbouElhamayed, Xilai Dai, Yang Wang, Marta Andronic, George A. Constantinides, and Mohamed S. Abdelfattah

   IEEE International Symposium on High-Performance Computer Architecture

   arXiv Bib Code

   @article{bitmod,
     title = {BitMoD: Bit-serial Mixture-of-Datatype LLM Acceleration},
     author = {Chen, Yuzong and AbouElhamayed, Ahmed F. and Dai, Xilai and Wang, Yang and Andronic, Marta and Constantinides, George A. and Abdelfattah, Mohamed S.},
     journal = {IEEE International Symposium on High-Performance Computer Architecture},
     year = {2025},
   }

2024

1. MICRO

   BBS: Bi-directional Bit-level Sparsity for Deep Learning Acceleration

   Yuzong Chen, Jian Meng, Jae-sun Seo, and Mohamed S. Abdelfattah

   IEEE/ACM International Symposium on Microarchitecture

   arXiv Bib Code

   @article{bbs,
     title = {BBS: Bi-directional Bit-level Sparsity for Deep Learning Acceleration},
     author = {Chen, Yuzong and Meng, Jian and Seo, Jae-sun and Abdelfattah, Mohamed S.},
     journal = {IEEE/ACM International Symposium on Microarchitecture},
     year = {2024},
   }

2. FPL

   Kratos: An FPGA Benchmark for Unrolled DNNs with Fine-Grained Sparsity and Mixed Precision

   Xilai Dai, Yuzong Chen, and Mohamed S. Abdelfattah

   International Conference on Field-Programmable Logic and Applications

   arXiv Bib Code

   @article{kratos,
     title = {Kratos: An FPGA Benchmark for Unrolled DNNs with Fine-Grained Sparsity and Mixed Precision},
     author = {Dai, Xilai and Chen, Yuzong and Abdelfattah, Mohamed S.},
     journal = {International Conference on Field-Programmable Logic and Applications},
     year = {2024},
   }

3. ICML

   Learning from Students: Applying t-Distributions to Explore Accurate and Efficient Formats for LLMs

   Jordan Dotzel, Yuzong Chen, Bahaa Kotb, Sushma Prasad, Gang Wu, Sheng Li, Mohamed S. Abdelfattah, and Zhiru Zhang

   IEEE International Conference on Machine Learning

   arXiv Bib Code

   @article{students,
     title = {Learning from Students: Applying t-Distributions to Explore Accurate and Efficient Formats for LLMs},
     author = {Dotzel, Jordan and Chen, Yuzong and Kotb, Bahaa and Prasad, Sushma and Wu, Gang and Li, Sheng and Abdelfattah, Mohamed S. and Zhang, Zhiru},
     journal = {IEEE International Conference on Machine Learning},
     year = {2024},
   }

2023

1. FPT

   M4BRAM: Mixed-Precision Matrix-Matrix Multiplication in FPGA Block RAMs

   Yuzong Chen, Jordan Dotzel, and Mohamed S. Abdelfattah

   IEEE International Conference on Field-Programmable Technology

   arXiv Bib Code

   @article{m4bram,
     title = {M4BRAM: Mixed-Precision Matrix-Matrix Multiplication in FPGA Block RAMs},
     author = {Chen, Yuzong and Dotzel, Jordan and Abdelfattah, Mohamed S.},
     journal = {IEEE International Conference on Field-Programmable Technology},
     year = {2023},
   }

2. FCCM

   BRAMAC: Compute-in-BRAM Architectures for Multiply-Accumulate on FPGAs

   Yuzong Chen, and Mohamed S. Abdelfattah

   IEEE International Symposium on Field-Programmable Custom Computing Machines

   arXiv Bib Code

   @article{bramac,
     title = {BRAMAC: Compute-in-BRAM Architectures for Multiply-Accumulate on FPGAs},
     author = {Chen, Yuzong and Abdelfattah, Mohamed S.},
     journal = {IEEE International Symposium on Field-Programmable Custom Computing Machines},
     year = {2023},
   }

3. TCAS-I

   BP-SCIM: A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory

   Yuzong Chen, Junjie Mu , Hyunjoon Kim, Lu Lu, and Tony Tae-Hyoung Kim

   IEEE Transactions on Circuits and Systems I: Regular Papers

   Bib HTML

   @article{bp-scim,
     title = {BP-SCIM: A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory},
     author = {Chen, Yuzong and Mu, Junjie and Kim, Hyunjoon and Lu, Lu and Kim, Tony Tae-Hyoung},
     journal = {IEEE Transactions on Circuits and Systems I: Regular Papers},
     year = {2023},
   }

2022

1. JETCAS

   An Overview of Processing-in-Memory Circuits for Artificial Intelligence and Machine Learning

   Donghyuk Kim, Chengshuo Yu, Shanshan Xie, Yuzong Chen , Joo-Young Kim , Bongjin Kim, Jaydeep Kulkarni, and Tony Tae-Hyoung Kim

   IEEE Journal on Emerging and Selected Topics in Circuits and Systems

   Bib HTML

   @article{jetcas22,
     title = {An Overview of Processing-in-Memory Circuits for Artificial Intelligence and Machine Learning},
     author = {Kim, Donghyuk and Yu, Chengshuo and Xie, Shanshan and Chen, Yuzong and Kim, Joo-Young and Kim, Bongjin and Kulkarni, Jaydeep and Kim, Tony Tae-Hyoung},
     journal = {IEEE Journal on Emerging and Selected Topics in Circuits and Systems},
     year = {2022},
   }

2. ISCAS

   A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory

   Yuzong Chen, Junjie Mu , Hyunjoon Kim, Lu Lu, and Tony Tae-Hyoung Kim

   IEEE International Symposium on Circuits and Systems

   Bib HTML

   @article{iscas22,
     title = {A Reconfigurable 8T SRAM Macro for Bit-Parallel Searching and Computing In-Memory},
     author = {Chen, Yuzong and Mu, Junjie and Kim, Hyunjoon and Lu, Lu and Kim, Tony Tae-Hyoung},
     journal = {IEEE International Symposium on Circuits and Systems},
     year = {2022},
   }

3. CICC

   A 181μW Real-Time 3-D Hand Gesture Recognition System based on Bi-directional Convolution and Memoryless Clustering

   Yuncheng Lu, Zehao Li, Yuzong Chen, and Tony Tae-Hyoung Kim

   IEEE Custom Integrated Circuits Conference

   Bib HTML

   @article{cicc22,
     title = {A 181μW Real-Time 3-D Hand Gesture Recognition System based on Bi-directional Convolution and Memoryless Clustering},
     author = {Lu, Yuncheng and Li, Zehao and Chen, Yuzong and Kim, Tony Tae-Hyoung},
     journal = {IEEE Custom Integrated Circuits Conference},
     year = {2022},
   }

2021

1. ISCAS

   A Multi-Functional 4T2R ReRAM Macro Enabling 2-Dimensional Access and Computing In-Memory

   Yuzong Chen, Lu Lu, Yuncheng Lu, and Tony Tae-Hyoung Kim

   IEEE International Symposium on Circuits and Systems

   Bib HTML

   @article{iscas21-1,
     title = {A Multi-Functional 4T2R ReRAM Macro Enabling 2-Dimensional Access and Computing In-Memory},
     author = {Chen, Yuzong and Lu, Lu and Lu, Yuncheng and Kim, Tony Tae-Hyoung},
     journal = {IEEE International Symposium on Circuits and Systems},
     year = {2021},
   }

2. ISCAS

   AND8T SRAM Macro with Improved Linearity for Multi-Bit In-Memory Computing

   Vishal Sharma , Ju Eon Kim, Yong-Jun Jo, Yuzong Chen, and Tony Tae-Hyoung Kim

   IEEE International Symposium on Circuits and Systems

   Bib HTML

   @article{iscas21-2,
     title = {AND8T SRAM Macro with Improved Linearity for Multi-Bit In-Memory Computing},
     author = {Sharma, Vishal and Kim, Ju Eon and Jo, Yong-Jun and Chen, Yuzong and Kim, Tony Tae-Hyoung},
     journal = {IEEE International Symposium on Circuits and Systems},
     year = {2021},
   }

3. ISCAS

   A Configurable Randomness Enhanced RRAM PUF with Biased Current Sensing Scheme

   Lu Lu, Yuzong Chen, and Tony Tae-Hyoung Kim

   IEEE International Symposium on Circuits and Systems

   Bib HTML

   @article{iscas21-3,
     title = {A Configurable Randomness Enhanced RRAM PUF with Biased Current Sensing Scheme},
     author = {Lu, Lu and Chen, Yuzong and Kim, Tony Tae-Hyoung},
     journal = {IEEE International Symposium on Circuits and Systems},
     year = {2021},
   }

4. OJCAS

   A Reconfigurable 4T2R ReRAM Computing In-Memory Macro for Efficient Edge Applications

   Yuzong Chen, Lu Lu , Bongjin Kim, and Tony Tae-Hyoung Kim

   IEEE Open Journal of Circuits and Systems

   Bib HTML

   @article{ojcas21,
     title = {A Reconfigurable 4T2R ReRAM Computing In-Memory Macro for Efficient Edge Applications},
     author = {Chen, Yuzong and Lu, Lu and Kim, Bongjin and Kim, Tony Tae-Hyoung},
     journal = {IEEE Open Journal of Circuits and Systems},
     year = {2021},
   }

5. TVLSI

   Reconfigurable 2T2R ReRAM Architecture for Versatile Data Storage and Computing In-Memory

   Yuzong Chen, Lu Lu , Bongjin Kim, and Tony Tae-Hyoung Kim

   IEEE Transactions on Very Large Scale Integration (VLSI) Systems

   Bib HTML

   @article{tvlsi21,
     title = {Reconfigurable 2T2R ReRAM Architecture for Versatile Data Storage and Computing In-Memory},
     author = {Chen, Yuzong and Lu, Lu and Kim, Bongjin and Kim, Tony Tae-Hyoung},
     journal = {IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
     year = {2021},
   }

2020

1. ISCAS

   Reconfigurable 2T2R ReRAM with Split Word-lines for TCAM Operation and In-Memory Computing

   Yuzong Chen, Lu Lu , Bongjin Kim, and Tony Tae-Hyoung Kim

   IEEE International Symposium on Circuits and Systems

   Bib HTML

   @article{iscas20,
     title = {Reconfigurable 2T2R ReRAM with Split Word-lines for TCAM Operation and In-Memory Computing},
     author = {Chen, Yuzong and Lu, Lu and Kim, Bongjin and Kim, Tony Tae-Hyoung},
     journal = {IEEE International Symposium on Circuits and Systems},
     year = {2020},
   }